HEAP (A Highly Efficient Adaptive multi-Processor framework)

HEAP (ICT-247615) project addresses a key problem in the development process for current and future multi-core and multi-threaded architectures: the identification of a sufficient amount of thread-level parallelism (i.e. macro-parallelism) to exploit the available hardware, without imposing an excessive burden on the communication structure (often a shared memory or cache).

HEAP Partners:

• STMicroelectronics S.r.l.
• Thales Communications S.A.
• Singular Logic S.A.
• ACE Associated Compiler Experts bv
• Compaan Design BV
• ATHENA, Industrial Systems Institute
• Politecnico di Torino
• University of Genoa – Dept. of Biophysical and Electronics Engineering
• Uppsala Universitet
• Synelixis Solutions Ltd